The present invention relates to methods and apparatus for generating an oscillator signal in digital communication systems, and more particularly to digitally controlled oscillator circuitry that provides selectable phase resolution.
Digital communication systems transfer information between two devices over a communication channel. In synchronous digital communications, it is often necessary to extract clock information from the received input signal or to otherwise generate a clock signal. Phase-locked loop (PLL) circuits are frequently utilized to lock an oscillator in phase with a reference signal. PLL circuits are often utilized within receivers in digital communication systems to generate a local clock signal that is phase aligned with an incoming reference signal. The phase aligned local clock signal facilitates the receipt and processing of data sent by a transmitter in the communication system.
A conventional PLL circuit includes a phase detector, a filter and a voltage-controlled oscillator (VCO). In the conventional PLL circuit, the phase detector compares the incoming reference signal and the output of the VCO. The phase detector generates an error signal that is representative of the phase difference of the reference signal and the VCO output. The error signal is filtered and applied to the control input of the VCO to produce an output signal that tracks the phase of the reference signal.
While such conventional PLL circuits provide effective generation of clock signals for many communication applications, they suffer from a number of limitations, which if overcome, could greatly improve the efficiency and utility of clock recovery circuits. For example, the VCOs in such conventional PLL circuits provide limited frequency control and frequency range and a slow reaction time. Due to relatively slow acquisition time constants, such VCOs do not permit a sudden change in frequency. A need therefore exists for an oscillator circuit that provides more precise frequency control and a broader frequency range. A further need exists for a numerically controlled ring oscillator that is adaptable for the implementation of a wide range of clock recovery and other signal generation applications.
Generally, a method and apparatus are disclosed for numerically controlling a ring oscillator. The disclosed programmable period ring oscillator selectively switches pairs of inverters into or out of the ring oscillator to provide a desired frequency. In one implementation, a programmable period ring oscillator provides a range of five to nine inverters that may selectively be included in the ring oscillator in increments of two inverters. The exemplary five-to-nine programmable period ring oscillator consists of three inverters and three multiplexers connected in a ring. Each multiplexer includes two gate delays and has a selection input. By selecting one of the three multiplexers, the selected multiplexer and all lower order multiplexers are included in the ring.
According to another aspect of the invention, a frequency synthesizer is disclosed that helps align the phase of the programmable ring oscillator with a reference signal. The frequency synthesizer compares the output of a ring oscillator with the output of a reference signal produced by a crystal controlled oscillator. The frequency synthesizer generates a phase difference signal that is representative of the phase difference between the reference signal and the ring oscillator output. The phase difference signal is utilized to correct the frequency of the ring oscillator, so that the mean phase of the ring oscillator corresponds to the mean phase of the reference signal.
According to yet another aspect of the invention, the state of all of the stages in the ring oscillator are sampled, to permit the phase of the ring oscillator to be measured to a fraction of one cycle. The LSBs of the reference signal contain the complete phase information of the reference signal. Thus, by taking the difference in the states of the ring oscillator and the reference signal, an accurate error signal is obtained to adjust the output frequency of the ring oscillator.
A more complete understanding of the present invention, as well as further features and advantages of the present invention, will be obtained by reference to the following detailed description and drawings.